This invention relates to a method of manufacturing an active matrix substrate comprising a row and column array of active elements, each element being associated with a switching thin film transistor (TFT), and ESD protective circuitry connected to the TFTs for protecting against electrostatic discharge (ESD). In particular, but not exclusively, the invention relates to the manufacture of active matrix substrates using complementary metal oxide semiconductor (CMOS) technology, for example, an active matrix liquid crystal display (AMLCD) having CMOS based TFTs switching TFTs or CMOS based integrated row and column driver circuitry.
The invention is described hereafter with reference to AMLCDs, however, it will be appreciated that the invention is not merely limited to AMLCDs but has application with respect to other types of large area electronic devices such as thin film data stores or image sensors.
As is well known, static electricity has the potential to destroy thin film devices comprising thin dielectric layers and of particular susceptibility to damage are the gate regions of MOS TFTs. With respect to AMLCDs, where TFT gate electrodes are connected to corresponding row conductors and TFT source and drain electrodes are connected to corresponding column conductors, it is known to protect against ESD by providing protective circuitry for regulating the current flow between row conductors and column conductors. For example, this may be achieved by connecting both the row and column conductors to a ground ring via a pair of opposing, partially resistive diodes connected in parallel. Such an arrangement is disclosed in PCT published patent application W097/13177 and also U.S. patents U.S. Pat. No. 5585949 and U.S. Pat. No. 5,930,607.
It is an object of the invention to provide a method of manufacturing an active matrix substrate of the type described above in which the performance of ESD protective circuitry is enhanced.
In accordance with the present invention, there is provided a method of manufacturing an active matrix substrate comprising a row and column array of active elements wherein each element is associated with a thin film transistor (TFT) having a gate electrode connected to a corresponding row conductor and source and drain electrodes connected to corresponding column conductors, and ESD protective circuitry connected to at least one of the row conductors for protecting the TFTs against electrostatic discharge (ESD). The method comprises the steps of forming semiconductor regions of the TFTs and the ESD protective circuitry; depositing gate electrodes of the TFTs and corresponding row conductors; and depositing source and drain electrodes of the TFTs and corresponding column conductors, wherein the ESD protective circuitry is operative to control ESD prior to deposition of the column conductors.
Whilst conventional ESD protective circuitry undoubtedly provides AMLCDs with protection against ESD during operation, the inventors have realized that it would be desirable for the ESD protective circuitry to be operative as early as possible during manufacture, and that this may be done prior to deposition of the column conductors.
Prior to deposition of the column conductors, the ESD protective circuitry may be operative to control ESD between the substrate and its external environment and, in particular, operative upon deposition of the row conductors.
This may be achieved by doping a semiconductor region of the ESD protective circuitry so as to provide a gentle conductive path from the part of that semiconductor region connected to a row conductor, through that semiconductor region to the external environment of the substrate, and to discourage current flow through that semiconductor region in the opposite direction.
Alternatively, for dissipating negative charge build-up on the substrate, a semiconductor region of the ESD protective circuitry may be doped so as to provide a gentle conductive path from external environment of the substrate, through that semiconductor region and to the part of that semiconductor region connected to a row conductor, and to discourage current flow through that semiconductor region in the opposite direction.
Upon completed manufacture of the active matrix substrate, the ESD protective circuitry may be operative to control ESD in a manner different from that used to control ESD prior to deposition of the column conductors. For example, the ESD protective circuitry may be operative to control ESD between the substrate and its external environment prior to deposition of the column conductors, and operative to control ESD between row and column conductors upon completed manufacture of the active matrix substrate.
The ESD protective circuitry may conveniently comprise either a lateral diode or a lateral, gate shorted TFT connected between row and column conductors and preferably at least one opposing pair of such diodes or TFTs connected in parallel between row and column conductors and, in particular, the semiconductor region of which may comprise two portions located either side of the active region of said diode or TFT, a first portion connected to the row conductor and a second portion on the other side of the active region at least twice and perhaps ten times the size of the first portion.
Further provided in accordance with the present invention is an active matrix substrate manufactured by a method according to the present invention, an active matrix substrate according to any of claims 13 to 15 and an AMLCD comprising such an active matrix substrate.